A team from China’s top government research academy pledged to produce this year a processor based on the open-source chip-design architecture RISC-V, as Beijing advances its semiconductor self-reliance drive amid escalating US restrictions.
The Chinese Academy of Sciences (CAS) will be able to deliver its XiangShan open-source central processing unit in 2025, wrote Bao Yungang, deputy director at the academy’s Institute of Computing Technology, in a Weibo post on Sunday.
China has an incredibly strong incentive to pursue this, and there’s massive state level funding behind such projects. I think there’s every reason to expect that they will succeed here.
Sounds very interesting.
Im not sure how open it will actually be, if they just mean its using RISC-V’s open design and its just lost in translation or if they are actually trying to make an open hardware ecosystem.
edit: I read a bit more, it seems to be a apache-like licensed software only processor that one needs to implement first, so basically something inbetween pre RISC-V and an actual chip. Still cool, but I was hoping it was a finished chip.
The processor definition is in Scala using Chisel. This produces an HDL (what’s needed for actual hardware) using a typed embedded domain specific language. This also compiles to a software model for validation. But that’s not the same as “software only”
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It’s all bulshit until we see reputable benchmarks. But I hope it happens. I’m balls deep into FOSS to not drool about the idea.
China has an incredibly strong incentive to pursue this, and there’s massive state level funding behind such projects. I think there’s every reason to expect that they will succeed here.
Sounds very interesting. Im not sure how open it will actually be, if they just mean its using RISC-V’s open design and its just lost in translation or if they are actually trying to make an open hardware ecosystem.
edit: I read a bit more, it seems to be a apache-like licensed software only processor that one needs to implement first, so basically something inbetween pre RISC-V and an actual chip. Still cool, but I was hoping it was a finished chip.
No no, this is actually open source. Not just the ISA, but also the silicon.
https://github.com/OpenXiangShan/XiangShan
The processor definition is in Scala using Chisel. This produces an HDL (what’s needed for actual hardware) using a typed embedded domain specific language. This also compiles to a software model for validation. But that’s not the same as “software only”