At RISC-V Summit North America 2025, Andrea Gallo, CEO RISC-V International, and Phil Wennblom, Chair of the ISO/IEC Joint Technical Committee (JTC 1)., announced that RISC-V International has been approved as a PAS Submitter by the ISO/IEC JTC1.
RISC-V is an industry standard, like USB or Wi-Fi. The specifications are publicly available under the Creative Commons license and every engineer, wherever they are in the world, can use them to design their products locally, while engaging with the global RISC-V ecosystem.
This standard is defined by RISC-V International and its members. Decisions are voted upon collectively, ensuring every member is heard. It’s a model that has worked for us for many years, ensuring any updates to the RISC-V ISA happen transparently, without breaking existing designs, and always in service of the broader ecosystem.
The RISC-V ISA is already an industry standard and the next step is impartial recognition from a trusted international organization.
Today, I’m excited to announce that we have taken that first step. RISC-V International has been approved as a recognized PAS (that’s publicly available specification) Submitter by the ISO/IEC Joint Technical Committee (JTC 1).
This means we’re able to submit draft international papers, starting with the The RISC-V Instruction Set Manual, for consideration as true, international standards.
What’s your ramp up prediction. I tinkered with a Banana Pi last year but don’t know about the broader implementation and production process so I’m curious, when do you expect performance parity for say <10x price (meaning performance of RPi for less than 500e) with e.g. RPi4, RPi5, Core i9, etc?
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Still no chips worth actually buying though.
It’s just Sparc 2.0
What’s your ramp up prediction. I tinkered with a Banana Pi last year but don’t know about the broader implementation and production process so I’m curious, when do you expect performance parity for say <10x price (meaning performance of RPi for less than 500e) with e.g. RPi4, RPi5, Core i9, etc?